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VHSIC Hard ware Description Language
VHDL stands for VHSIC ( very high speed integrated Circuits) Hardware Description Language. This article deals with VHDL, as Description Language . This article
Deals with VHDL , as described by the IEEE standard!)1076-1993.although this language look similar to conventional programming language, there are some important difference.
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We all know about computer programs , the ones run on the computers like c, c++, java etc. But have your ever thought of programming hardware! If you lan to , This is must read for you. When you want to add two numbers you you write a program in language of your choice and you see the result o the computer. Is it possible ? Hard ware Descriptive Language(HDL) you can program a a hard ware function as any logic System like of an and gate Or NOR gate or Subtracter orMUX(Multiplexer) even An ALU((Arithmetic and Logic Unit).
There are number of HDL like VHDL,Verilog , system c etc. .Depending on the type of application an dthe area of need , these Language are selected. VHDL is difficult to learn but it is very reliable, while Virology is easier t learn but not a good tool for high level designs. System c on the other hand is an industry Standards. In the Mid 1980's the US.
VHDL VHSIC Hard ware Description Language
This article deals with VHDL , as described by the IEEE standard 1076-1993. Although this language look similar to conventional programming language, there are some important differences. A hardware description language is inherently Parrnell, ie commands, which correspond to logic gates, are executed(computed)in parallel, as soon as new input arrives. A HDL Program mimics the behavior of a physical, usually digital, system. Italso allow incorporate of timing specification as well as to describe a system as inter connection different components.
Levels of representation and abstraction
A digital System can be represented at different levels of abstraction i.e; while one part of Details the structure the other part of presents the behavior (function of the circuit) .This keeps the description and design of complex system manageable. The highest level of abstraction is the behavioral level that describes a System in terms of what it does (or how it behaves)rather than terms of its component and interconnection between them . A behavioral description specifies t the relationship between the input and output signals, This could be Boolean expression or a more abstract description such a the register Transfer or Algorithmic level.
The structural level , on the other hand describes a system as collection of gates and components that are inter connected to perform a described function. A structural description could be compared to a schematic of interconnected logic gates . it is a representation that is usually closer to the physical realization of a a system . VHDL allows one to describe a digital system at the structural or the behavioral level . The Behavioral level can be further divided into kind of style: Data flow and Algorithmic.
Basic structure of a VHDL file
VHDL uses reserved keywords that cannot be used signal names or identifies. Key Words and users defined identifies are case insensitive . Lines with comments start with two adjacent hyphens(--)and will be ignored line breaks and extra spaces . VHDL is a strong typed language which implies that one has always declare the type of very object that can have a value , such as signal constants and variables. When saving your programming extension for a VHDL file is .vhd
The fundamental units of VHDL include
1.Library and packages
2. Entity
3. Architecture
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